ADF4153 12Ghz PLL

I have been playing around with a small ADF4153 12Ghz PLL with the idea of using it as a LO (11.736Ghz) for a 47Ghz transverter.

Screen Shot 2017-08-05 at 11.37.26 am

The unit contains a transistor VCO controlled by the ADF4153 PLL. The output is feed into a HMC189 passive frequency doubler, then through a BPF, a HMC369 active frequency doubler, through a BPF once again and finally amplified by a HMC441 to provide > +15dBm.

The PLL has a tuning range of around 500Mhz and by moved in the 11 to 13.5Ghz band.

The output can be seen below.

Screen Shot 2017-08-05 at 11.37.48 am

The PLL is programmed using “SPI” like interface. Four registers are used to control the PLL. The initialisation sequence is as follows:

  1. Write all zeros to the noise and spur register. This ensures that all test modes are cleared. (R3)
  2. Write again to the noise and spur register, this time selecting which noise and spur mode is required. (R3)
  3. Enable the counter reset in the control register  also select the required settings in the control register. (R2)
  4. Load the R divider register (R1)
  5. Load the N divider register. (R0)
  6. Disable the counter reset in the control register. (R2)

IMG_0344

IMG_0345

I have used a ATTINY 13A to program the unit with following C code:

//*****************************************************************************
// File Name	: ADF4153.c
//
// Title		: ADF4153 PLL 
// Revision		: 1.0
// Notes		:
// Target MCU	: Atmel AVR series
//
// Revision History:
// When			Who			Description of change
// -----------	-----------	-----------------------
// 08AUG17	VK5TX		Created the program
//***********************************************************************
#define F_CPU        8000000               		// 8MHz processor

//----- Include Files ---------------------------------------------------
#include <util/delay.h>
#include <avr/io.h>		// include I/O definitions 

void WriteRegister(uint32_t data)
{
	_delay_us(10);
	PORTB &= ~(1<<PB2); //low LE	
	for (int j=23; j >= 0; j--) 
	{
		if ((data >> j) & 1)
		PORTB |= (1<<PB3); //high DATA
		else
		PORTB &= ~(1<<PB3); //low DATA	
		_delay_us(10);
		PORTB |= (1<<PB4); //high CLOCK
		_delay_us(10);
		PORTB &= ~(1<<PB4); //low CLOCK
		_delay_us(10);
	}
	PORTB &= ~(1<<PB4); //low CLOCK
	PORTB |= (1<<PB2); //high LE
	_delay_us(10);
	PORTB &= ~(1<<PB2); //low LE
}

void WriteAllRegisters()
{
	uint32_t Register;
	// Register 3
	Register = (0x000003);
	WriteRegister(Register);

	// Register 3
	Register = (0x000383);
	WriteRegister(Register);

	// Register 2
	Register = (0x0017C6);
	WriteRegister(Register);

	// Register 1
	Register = (0x144191);
	WriteRegister(Register);

	// Register 0
	
	Register = (0x248118);
	WriteRegister(Register);
	
	// Register 2
	Register = (0x0017C2);
	WriteRegister(Register);
}

int main(void)
{
	DDRB |= (1<<PB4) | (1<<PB3)  | (1<<PB2); //PB2 PB3 PB4 as Output
	PORTB |= (1<<PB4);	//high CLK
	PORTB |= (1<<PB2);	//high LE
	PORTB &= ~(1<<PB3);	//low DATA
	_delay_ms(500); 
	WriteAllRegisters();
	while(1)
	{	
	}
}

Screen Shot 2017-08-05 at 11.38.08 am

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